Field of the Invention
Embodiments of the present invention relate to a printed circuit board having coextensive electrical connectors and contact pad areas.
Description of the Related Art
The strong growth in demand for portable consumer electronics is driving the need for high-capacity storage devices. Non-volatile semiconductor memory devices, such as flash memory storage cards and devices, are becoming widely used to meet the ever-growing demands on digital information storage and exchange. Their portability, versatility and rugged design, along with their high reliability and large capacity, have made such memory devices ideal for use in a wide variety of electronic devices, including for example digital cameras, digital music players, video game consoles, PDAs and cellular telephones.
Flash memory devices may include a printed circuit board (“PCB”) for supporting electronic components and/or for transmitting electrical signals and power and ground voltages. In general, a PCB may include one or more layers of a dielectric substrate having a conductive layer laminated onto one or both surfaces. Using techniques such as photolithography, conductance patterns may be defined in the conductive layers. The conductance patterns include electrical traces for communicating signals and power/ground voltage to and from the electronic components on the PCB.
Although it is known to form conductance patterns with very fine electrical traces, owing to the number of connections required on modern-day PCBs, there may not be enough surface area in a single-layered PCB to affect the required signal and voltage (power and ground) transfer. It is therefore known to form PCBs with a plurality of conductive layers, each separated by a dielectric substrate. At present, it is known to provide PCBs with as many as twenty or more layers. In order to communicate signals and power/ground voltages between the various layers, holes, known as vias, are formed through respective layers. Once formed, the vias are either plated or filled with a metal to provide electrical communication between adjacent layers.
It is known to form vias all the way through the substrate by mechanical drilling methods. A problem with this approach is that substrates often include large contact pads for receiving surface mounted components. Conventionally, the contact pads have been defined with a size and shape matching the size and shape of the contact to be surface mounted thereto. With their relatively large size, a pair of vias formed straight through the substrate may short together as a result of their both being in electrical communication with a single contact pad. Therefore, conventional PCBs include a large “keep-out” area surrounding the contact pads on the substrate, within which keep-out area no vias are formed.
An example of a conventional PCB is shown in the prior art FIGS. 1 and 2 which show a cross-sectional view and a bottom view, respectively, of a PCB substrate 20. FIG. 1 shows substrate 20 including a plurality of dielectric layers 22, metal layers 24, vias 26 and contact pads 28. The substrate 20 may also be laminated with a solder mask 30. FIG. 1 also illustrates contacts 32 which have been surface mounted to the contact pads 28 as by soldering. As indicated above, the contact pads 28 have conventionally been formed to match the size and shape of the contacts 32 soldered thereto. As shown in FIG. 1, without a keep-out area, two vias 26a and 26b might short together as a result of being formed in contact with a single contact pad (contact pad 28a in this example). In order to avoid this possibility, keep-out areas 34 are defined on the substrate, as shown in dashed lines in FIG. 2, within which no vias a formed.
As an alternative to vias formed straight through a substrate by mechanical drilling, vias may be formed with a laser. Such vias may be “blind,” i.e., visible from only one of the top and bottom surfaces of the PCB, or “buried,” i.e., not visible from either the top or bottom surface of the PCB. Blind and buried vias are, however, difficult to fabricate and add time and expense to the substrate manufacturing process.